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NB3L8543S: 2.5 V/3.3 V Differential 2:1 MUX to 4 LVDS Clock Fanout Buffer Outputs with Clock Enable and Clock Select

Overview
Specifications
Datasheet: 2.5V/3.3V Differential 2:1 MUX to 4 LVDS Fanout Buffer Outputs
Rev. 1 (228kB)
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製品説明
The NB3L8543S is a high performance, low skew 1−to−4 LVDS Clock Fanout Buffer. The NB3L8543S features a multiplexed input which can be driven by either a differential or single−ended input to allow for the distribution of a lower speed clock along with the high speed system clock. The CLK_SEL pin will select the differential CLK and CLKb inputs when LOW (or left open and pulled LOW by the internal pull−down resistor). When CLK_SEL is HIGH, the differential PCLK and PCLKb inputs are selected. The common clock enable pin, CLK_EN, is synchronous so that the outputs will only be enabled/disabled when they are already in the LOW state. This avoids any chance of generating a runt clock pulse on the outputs during asynchronous assertion/deassertion of the clock enable pin. The internal flip flop is clocked on the falling edge of the input clock; therefore, all associated specification limits are referenced to the negative edge of the clock input.
特長
 
  • Four Differential LVDS Output Pairs
  • Two Selectable Differential Clock Inputs
  • CLK/CLKb Can Accept LVPECL, LVDS, HCSL, HSTL and SSTL
  • PCLK/PCLK Can Accept LVPECL, LVDS, CML and SSTL
  • Maximum Output Frequency: 650 MHz
  • Additive Phase Jitter, RMS: 50 fs (typical)
  • Output Skew: 40 ps (maximum)
  • Part−to−part Skew: 200 ps (maximum)
  • Propagation Delay: 1.9 ns (maximum)
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データシート (1)  
供給状況 & サンプル
製品
状態
Compliance
内容
外形
MSL*
梱包形態
予算 価格/Unit
タイプ
Case Outline
タイプ
数量
NB3L8543SDTG Active
Pb-free
Halide free
2.5 V/3.3 V Differential 2:1 MUX to 4 LVDS Clock Fanout Buffer Outputs with Clock Enable and Clock Select TSSOP-20 948E-02 1 Tube 75 Contact Sales Office
NB3L8543SDTR2G Active
Pb-free
Halide free
2.5 V/3.3 V Differential 2:1 MUX to 4 LVDS Clock Fanout Buffer Outputs with Clock Enable and Clock Select TSSOP-20 948E-02 1 Tape and Reel 2500 Contact Sales Office
面実装デバイスためのモイスチャー・レベル(260°Cリフローでの鉛フリー測定、235°Cリフローでの鉛フリー以外測定)
マーケットリードタイム(週) : 2 to 4
ON Semiconductor   (2015-07-08) : 1,800
マーケットリードタイム(週) : Contact Factory
Datasheet: 2.5V/3.3V Differential 2:1 MUX to 4 LVDS Fanout Buffer Outputs
Rev. 1 (228kB)
»材料組成を表示
»No Product Change Notifications exist
GreenPoint®デザイン・ツール
Product Overview

Product Compliance Status Description Type Channels Input / Output Ratio Input Level Output Level VCC Typ (V) tJitterRMS Typ (ps) tskew(o-o) Max (ps) tpd Typ (ns) tR & tF Max (ps) fmaxClock Typ (MHz) fmaxData Typ (Mbps) Package Type
 Pb-free 
 Halide free 
 Active     2.5 V/3.3 V Differential 2:1 MUX to 4 LVDS Clock Fanout Buffer Outputs with Clock Enable and Clock Select   Buffer   1   2:1:4 
 CML 
 HCSL 
 HSTL 
 LVDS 
 LVPECL 
 SSTL 
 LVDS   2.5V, 3.3V   0.05   40   1.4 
 500 
 550 
 500 
 650 
   TSSOP-20 
 Pb-free 
 Halide free 
 Active     2.5 V/3.3 V Differential 2:1 MUX to 4 LVDS Clock Fanout Buffer Outputs with Clock Enable and Clock Select   Buffer   1   2:1:4 
 CML 
 HCSL 
 HSTL 
 LVDS 
 LVPECL 
 SSTL 
 LVDS   2.5V, 3.3V   0.05   40   1.4 
 500 
 550 
 500 
 650 
   TSSOP-20 
Datasheet: 2.5V/3.3V Differential 2:1 MUX to 4 LVDS Fanout Buffer Outputs
Rev. 1 (228kB)
»材料組成を表示
»No Product Change Notifications exist
GreenPoint®デザイン・ツール
Product Overview
Case Outline
948E-02   
Datasheet: 2.5V/3.3V Differential 2:1 MUX to 4 LVDS Fanout Buffer Outputs
Rev. 1 (228kB)
»材料組成を表示
»No Product Change Notifications exist
GreenPoint®デザイン・ツール
Product Overview
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