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MC74HC4046A: Phase Locked Loop

Overview
Specifications
Packages
Datasheet: Phase-Locked Loop
Rev. 11 (169kB)
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Product Overview
製品説明
High-Performance Silicon-Gate CMOS

The MC74HC4046A is similar in function to the MC14046 Metal gate CMOS device. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

The HC4046A phase-locked loop contains three phase comparators, a voltage-controlled oscillator (VCO) and unity gain op-amp DEMOUT. The comparators have two common signal inputs, COMPIN, and SIGIN. Input SIGIN and COMPIN can be used directly coupled to large voltage signals, or indirectly coupled (with a series capacitor to small voltage signals). The self-bias circuit adjusts small voltage signals in the linear region of the amplifier. Phase comparator 1 (an exclusive OR gate) provides a digital error signal PC1OUT and maintains 90 degrees phase shift at the center frequency between SIGIN and COMPIN signals (both at 50% duty cycle). Phase comparator 2 (with leading-edge sensing logic) provides digital error signals PC2OUT and PCPOUT and maintains a 0 degree phase shift between SIGIN and COMPIN signals (duty cycle is immaterial). The linear VCO produces an output signal VCOOUT whose frequency is determined by the voltage of input VCOIN signal and the capacitor and resistors connected to pins C1A, C1B, R1 and R2. The unity gain op-amp output DEMOUT with an external resistor is used where the VCOIN signal is needed but no loading can be tolerated. The inhibit input, when high, disables the VCO and all op-amps to minimize standby power consumption.

Applications include FM and FSK modulation and demodulation, frequency synthesis and multiplication, frequency discrimination, tone decoding, data synchronization and conditioning, voltage-to-frequency conversion and motor speed control.
特長
 
  • Output Drive Capability: 10 LSTTL Loads
  • Low Power Consumption Characteristic of CMOS Devices
  • Operating Speeds Similar to LSTTL
  • Wide Operating Voltage Range: 3.0 to 6.0 V
  • Low Input Current: 1.0 mA Maximum (except SIGIN and COMPIN)
  • In Compliance with the Requirements Defined by JEDEC Standard No. 7A
  • Low Quiescent Current: 80 mA Maximum (VCO disabled)
  • High Noise Immunity Characteristic of CMOS Devices
  • Diode Protection on all Inputs
  • Chip Complexity: 279 FETs or 70 Equivalent Gates
  • Pb-Free Packages are Available*
技術資料 & デザイン・リソース
アプリケーション ノート (1) パッケージ図 (2)
データシート (1)  
供給状況 & サンプル
製品
状態
Compliance
内容
外形
MSL*
梱包形態
予算 価格/Unit
タイプ
Case Outline
タイプ
数量
MC74HC4046ADG Active
Pb-free
Halide free
Phase Locked Loop SOIC-16 751B-05 1 Tube 48 Contact Sales Office
MC74HC4046ADR2G Active
Pb-free
Halide free
Phase Locked Loop SOIC-16 751B-05 1 Tape and Reel 2500 Contact Sales Office
MC74HC4046ADTG Active
Pb-free
Halide free
Phase Locked Loop TSSOP-16 948F-01 1 Tube 96 Contact Sales Office
MC74HC4046ADTR2G Active
Pb-free
Halide free
Phase Locked Loop TSSOP-16 948F-01 1 Tape and Reel 2500 Contact Sales Office
NLV74HC4046ADR2G Active
AEC Qualified
PPAP Capable
Pb-free
Halide free
Phase Locked Loop SOIC-16 751B-05 1 Tape and Reel 2500 $0.264
面実装デバイスためのモイスチャー・レベル(260°Cリフローでの鉛フリー測定、235°Cリフローでの鉛フリー以外測定)
マーケットリードタイム(週) : 2 to 4
Digikey   (2015-07-09) : <1K
Mouser   (2015-07-09) : >1K
マーケットリードタイム(週) : 2 to 4
Avnet   (2015-07-09) : >1K
Mouser   (2015-07-09) : >1K
マーケットリードタイム(週) : 2 to 4
Mouser   (2015-07-09) : >1K
ON Semiconductor   (2015-07-08) : 3,168
マーケットリードタイム(週) : 4 to 8
Avnet   (2015-07-09) : >1K
Digikey   (2015-07-09) : >1K
Mouser   (2015-07-09) : >1K
マーケットリードタイム(週) : 8 to 12
Datasheet: Phase-Locked Loop
Rev. 11 (169kB)
»信頼性データを表示する
»材料組成を表示
»製品変更通知 (6)
Product Overview

Product Compliance Status Description Input Level Output Level fMax Typ (MHz) VCC Typ (V) Duty Cycle (%) Package Type
 Pb-free 
 Halide free 
 Active     Phase Locked Loop   CMOS   CMOS   3   6   50   SOIC-16 
 Pb-free 
 Halide free 
 Active     Phase Locked Loop   CMOS   CMOS   3   6   50   SOIC-16 
 Pb-free 
 Halide free 
 Active     Phase Locked Loop   CMOS   CMOS   3   6   50   TSSOP-16 
 Pb-free 
 Halide free 
 Active     Phase Locked Loop   CMOS   CMOS   3   6   50   TSSOP-16 
 AEC Qualified 
 PPAP Capable 
 Pb-free 
 Halide free 
 Active     Phase Locked Loop   CMOS   CMOS   3   6   50   SOIC-16 
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