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データシート
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ドキュメントタイプ:
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- または - |
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データシート のため
低電圧ECLinPS Lite
(すべてを表示)
ページ・サイズ:
1 - 28 of 28
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1
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| 3.3 V ECL ÷2 Divider |
MC100LVEL32/D (133.0kB) |
10 |
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| 3.3/5V ECL Differential Phase-Frequency Detector |
MC100LVEL40/D (114.0kB) |
8 |
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| 3.3V ECL 2/4, 4/6 Clock Generation Chip |
MC100LVEL39/D (136.0kB) |
10 |
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| 3.3V ECL /2, /4, /8 Clock Generation Chip |
MC100LVEL34/D (93kB) |
4 |
Apr, 2014 |
| 3.3V ECL 1:2 Differential Fanout Buffer |
MC100LVEL11/D (93kB) |
13 |
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| 3.3V ECL 1:4 ÷ 1/÷ 2 Clock Fanout Buffer |
MC100LVEL37/D (133.0kB) |
6 |
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| 3.3V ECL 1:5 Clock Distribution Chip |
MC100LVEL14/D (162.0kB) |
9 |
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| 3.3V ECL 2-Input Differential AND/NAND |
MC100LVEL05/D (132.0kB) |
4 |
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| 3.3V ECL 2:1 Multiplexer |
MC100LVEL58/D (119.0kB) |
6 |
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| 3.3V ECL 4-Input OR/NOR Gate |
MC100LVEL01/D (124.0kB) |
4 |
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| 3.3V ECL D Flip-Flop with Set and Reset |
MC100LVEL31/D (127.0kB) |
4 |
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| 3.3V ECL DIV2, DIV4/6 Clock Generator Chip |
MC100LVEL38/D (219.0kB) |
10 |
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| 3.3V ECL Differential Clock D Flip-Flop |
MC100LVEL51/D (128.0kB) |
6 |
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| 3.3V ECL Differential Receiver |
MC100LVEL16/D (95kB) |
7 |
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| 3.3V ECL Divide by 4 Divider |
MC100LVEL33/D (133.0kB) |
5 |
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| 3.3V ECL Dual 1:3 Fanout Buffer |
MC100LVEL13/D (131.0kB) |
6 |
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| 3.3V ECL Dual Differential 2:1 Multiplexer |
MC100LVEL56/D (136.0kB) |
12 |
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| 3.3V ECL Dual Differential Data and Clock D Flip-Flop with Set and Reset |
MC100LVEL29/D (133.0kB) |
6 |
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| 3.3V ECL Low Impedance Driver |
MC100LVEL12/D (126.0kB) |
4 |
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| 3.3V ECL Quad Differential Receiver |
MC100LVEL17/D (132.0kB) |
8 |
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| 3.3V ECL Triple 2:1 Multiplexer |
MC100LVEL59/D (109.0kB) |
4 |
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| 3.3V ECL Triple D Flip-Flop with Set and Reset |
MC100LVEL30/D (113.0kB) |
7 |
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| 3.3V LVTTL/LVCMOS to Differential LVPECL Translator |
MC100LVELT20/D (101.0kB) |
0 |
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| Translator, Dual Differential LVPECL to LVTTL |
MC100LVELT23/D (127.0kB) |
18 |
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| Translator, Dual LVTTL / LVCMOS to Differential LVPECL |
MC100LVELT22/D (155kB) |
10 |
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| Translator, Triple ECL Input to LVPECL Output |
MC100LVEL90/D (112.0kB) |
11 |
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| Translator, Triple LVPECL / PECL Input to ECL Output |
MC100LVEL91/D (125.0kB) |
11 |
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| Translator, Triple PECL Input to LVPECL Output |
MC100LVEL92/D (129.0kB) |
12 |
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