Application daughter-card for NCP51561 5 kV isolated half-bridge gate driver

Overview

The SECO-NCP51561BADWR2G-GEVB is an evaluation board for the NCP51561 5 kVRMS isolated dual channel gate driver. The board includes all the necessary driver circuit and it can be used directly on an application or plugged into the SECO-GDBB-GEVB gate driver ecosystem board for a quick-start evaluation the gate driver.

  • Flexible: Dual Low−Side, Dual High−Side or Half−Bridge Gate Driver
  • Independent UVLO Protections for Both Output Drivers
  • Output Supply Voltage from 6.5 V to 30 V with 5−V, 8−V, and 17−V UVLO threshold
  • 4−A Peak Source, 8−A Peak Sink Output
  • 150 V/ns dV/dt Immunity
  • 36 ns Typical Propagation Delay
  • 8 ns Max Delay Matching
  • User Programmable Input Logic
    • Single or Dual−input modes via ANB
  • User Programmable Dead−Time
  • Enable Function
  • Isolation & Safety
    • 5 kVRMS Galvanic Isolation from input to each output and 1200 V peak differential voltage between output channels
    • 1200 V Working Voltage (per VDE0884−11 Requirements)

Evaluation/Development Tools

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Application daughter-card for NCP51561 5 kV isolated half-bridge gate driver

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技術文書

Name / Description

Document Type

Modified date

EVBUM2756/D

4

Eval Board: Manual

2.51 MB

EN

Eval Board: Manual

February 01, 2022

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SECO-NCP51561BADWR2G-GEVB_GERBER

0

Eval Board: Gerber

88.06 KB

EN

Eval Board: Gerber

October 01, 2020

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SECO-NCP51561BADWR2G-GEVB_BOM

0

Eval Board: BOM

312.32 KB

EN

Eval Board: BOM

October 01, 2020

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SECO-NCP51561BADWR2G-GEVB_SCHEMATIC

0

Eval Board: Schematic

262.14 KB

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Eval Board: Schematic

October 01, 2020

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