HAL Power Modes Macro Definition Documentation

 

BLE_PRESENT

#define BLE_PRESENT 1

 

Location: power_modes.h:42

 

Macro for enabling BLE stack RF registers copy during sleep/wakeup, used in sleep_mode_cfg, or standby_mode_cfg, or deepsleep_mode_cfg.

 

BLE_NOT_PRESENT

#define BLE_NOT_PRESENT 0

 

Location: power_modes.h:47

 

Macro for disabling BLE stack RF registers copy during sleep/wakeup, used in sleep_mode_cfg, or standby_mode_cfg, or deepsleep_mode_cfg.

 

RF_REGISTERS_IMAGE_SIZE_BYTES

#define RF_REGISTERS_IMAGE_SIZE_BYTES 0xf8

 

Location: power_modes.h:50

 

Size of RF registers in bytes.

 

VDDMRETENTION_TRIM_MINIMUM

#define VDDMRETENTION_TRIM_MINIMUM 0x0U

 

Location: power_modes.h:53

 

VDDM retention minimum trim value.

 

VDDMRETENTION_TRIM

#define VDDMRETENTION_TRIM 0x1U

 

Location: power_modes.h:56

 

VDDM retention trim value.

 

VDDMRETENTION_TRIM_MAXIMUM

#define VDDMRETENTION_TRIM_MAXIMUM 0x3U

 

Location: power_modes.h:59

 

VDDM retention maximum trim value.

 

VDDTRETENTION_DISABLE

#define VDDTRETENTION_DISABLE 0x0U

 

Location: power_modes.h:62

 

VDDT baseband retention regulator disable.

 

VDDTRETENTION_ENABLE

#define VDDTRETENTION_ENABLE 0x1U

 

Location: power_modes.h:65

 

VDDT baseband retention regulator enable.

 

VDDCRETENTION_TRIM_MINIMUM

#define VDDCRETENTION_TRIM_MINIMUM 0x0U

 

Location: power_modes.h:68

 

VDDC retention minimum trim value.

 

VDDCRETENTION_TRIM

#define VDDCRETENTION_TRIM 0x1U

 

Location: power_modes.h:71

 

VDDC retention trim value.

 

VDDCRETENTION_TRIM_MAXIMUM

#define VDDCRETENTION_TRIM_MAXIMUM 0x3U

 

Location: power_modes.h:74

 

VDDC retention maximum trim value.

 

VDDACSRETENTION_TRIM_MINIMUM

#define VDDACSRETENTION_TRIM_MINIMUM 0x0U

 

Location: power_modes.h:77

 

VDDACS retention maximum trim value.

 

VDDACSRETENTION_TRIM

#define VDDACSRETENTION_TRIM 0x1U

 

Location: power_modes.h:80

 

VDDACS retention trim value.

 

VDDACSRETENTION_TRIM_MAXIMUM

#define VDDACSRETENTION_TRIM_MAXIMUM 0x3U

 

Location: power_modes.h:83

 

VDDACS retention maximum trim value.

 

RSL15_CHIP_ID_SV2

#define RSL15_CHIP_ID_SV2 0x0B020200U

 

Location: power_modes.h:86

 

RSL15 SV2 Chip ID value.

 

CHIP_ID_IS_SV2

#define CHIP_ID_IS_SV2 (AHBREGS->CHIP_ID_NUM == RSL15_CHIP_ID_SV2)

 

Location: power_modes.h:91

 

Is the current chip ID SV2?

 

CP_ENABLED_IN_SLEEP

#define CP_ENABLED_IN_SLEEP (ACS->SLEEP_MODE_CFG & (1 << ACS_SLEEP_MODE_CFG_VDDCP_ENABLE_Pos))

 

Location: power_modes.h:94

 

Is the charge pump enabled in sleep mode?

 

STANDBYCLK_IS_ENABLED

#define STANDBYCLK_IS_ENABLED ((ACS->XTAL32K_CTRL & (1 << ACS_XTAL32K_CTRL_READY_Pos)) || \ (ACS->RCOSC_CTRL & (1 << ACS_RCOSC_CTRL_RC32_OSC_EN_Pos)))

 

Location: power_modes.h:97

 

Is the STANDBYCLK enabled?