Low/Medium Voltage MOSFETs | FDMS6681Z

Pチャネル PowerTrench® MOSFET -30V、-122A、3.2mΩ

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Overview

FDMS6681Zは、ロードスイッチアプリケーションでの損失を最小限に抑えるように設計されています。シリコン技術およびパッケージ技術の両方の進歩が組み合わされ、最低のrDS（on）およびESD保護を実現しています。

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  • Industrial, Consumer, and High End Computing

  • 最大 rDS(on) = 3.2 mΩ @ VGS = -10 V、ID = -21.1 A
  • 最大 rDS(on) = 5.0 mΩ @ VGS = -4.5 V、ID = -15.7 A
  • 低いrDS(on) と高効率のための高度なパッケージとシリコンの組み合わせ
  • HBM ESD保護レベル、8kV通常(注3)
  • MSL1堅牢パッケージ設計
  • RoHS対応

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状態

CAD Models

Compliance

Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

Channel Polarity

Silicon Family

Package Name

Type

Gate Level

Wide SOA Mosfets

Configuration

OPN in older Technology

V(BR)DSS Min (V)

RDS(on) Max @ VGS = 10 V (mΩ)

Vgs (V)

Vgs(th) Max (V)

ID Max (A)

PD Max (W)

RDS(on) Max @ VGS = 2.5 V (mΩ)

RDS(on) Max @ VGS = 4.5 V (mΩ)

Qg Typ @ VGS = 4.5 V (nC)

Qg Typ @ VGS = 10 V (nC)

Ciss Typ (pF)

Qgd Typ @ VGS = 4.5 V (nC)

Qrr Typ (nC)

Coss Typ (pF)

Crss Typ (pF)

Reference Price

FDMS6681Z

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CAD Model

Pb

A

H

P

PQFN-8

483AE

1

260

REEL

3000

N

P-Channel

PowerTrench® T1

Power 56 (SO-8FL)

Low-Medium Voltage

Logic

0

Single

0

-30

3.2

25

-3

-122

73

-

5

39

97

7803

-

-

-

-

Price N/A

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信頼性データ

Die Related Summary Data

Device: FDMS6681Z

Equivalent to wafer fab process: TV

製品技術

製品技術

等価デバイス時間

MTBF/MTTF (時間)

FITS

TV

0

1399545734

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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