DDR Termination Regulators | NCP51145

1.8A ソース / シンク VTT DDR 終端レギュレータ

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Overview

NCP51145 は、DDR-II、DDR-III、LPDDR-III、および DDR-IV メモリ・アプリケーションに、調整された VTT 終端電圧を供給するように設計されたリニア・レギュレータです。レギュレータは、出力電圧を ±20 mV 以内に調整しながら、±1.8 A のピーク電流をアクティブにソースおよびシンクできます。出力終端電圧は、PVCC、GND、VREF ピンに接続された 2 つの外部電圧ディバイダ抵抗によって、VDDQ / 2 を追跡するように調整されます。NCP51145 には高速差動アンプが組み込まれており、ラインおよび負荷の過渡現象に対して超高速の応答を提供します。その他の機能には、ソース/シンク電流制限、ソフトスタート、およびオンチップのサーマル・シャットダウン保護が含まれます。

  • DDR−II / DR−III / DDR−IV SDRAM Termination Voltage
  • Low Power DDR−3LP
  • Motherboard, Notebook, and VGA Card Memory Termination
  • Set Top Box, Digital TV, Printers
  • For DDR VTT Applications, Source/Sink Currents
  • Supports DDR−II to ±1.8 A, DDR−III to ±1.5 A
  • Supports LPDDR−III and DDR−IV to ±1.2 A
  • Stable Using Ceramic−Only (Very Low ESR) Capacitors
  • Integrated Power MOSFETs
  • High Accuracy VTT Output at Full−Load
  • Fast Transient Response
  • Built−in Soft−Start
  • Shutdown for Standby or Suspend Mode
  • Integrated Thermal and Current−Limit Protection

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Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

Container Qty.

ON Target

DDR Memory Type

IOUT VTT Max (A)

IQ Typ (µA)

VCC Bias Min (V)

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Power Good

Reference Price

NCP51145MNTAG

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Obsolete

CAD Model

Pb

A

H

P

DFN-8

506AA

1

260

REEL

3000

N

DDR

1.8

1000

4.75

5.25

No

No

Price N/A

More Details

NCP51145PDR2G

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Obsolete

CAD Model

Pb

A

H

P

SOIC-8 NB EP

751BU

2

260

REEL

2500

N

DDR

1.8

1000

4.75

5.25

No

No

Price N/A

More Details

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