DDR Termination Regulators | NCP51401

3 A VTT 終端レギュレータ DDR1/DDR2/DDR3/LPDDR3/DDR4

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Overview

NCP51401 はソース/シンク Double Data Rate (DDR) 終端レギュレータで、スペースが主な考慮事項となる低入力電圧/低ノイズ・システムに特化して設計されています。NCP51401 は高速過渡応答を維持し、必要な最小出力静電容量はわずか 20 uF です。NCP51401 はリモート・センシング機能と、DDR VTT バス終端のすべての電力要件をサポートします。NCP51401 は、出力電圧が動的に調整可能であることが要求される低電力チップセットとグラフィック・プロセッサ・コアでも使用できます。

  • DDR Memory Termination
  • Servers and Networking equipment
  • Graphics Processor Core Supplies
  • Chipset/RAM Supplies as Low as 0.5 V

  • Set Top Boxes, LCD−TV/PDP−TV, Copier/Printers
  • Desktop PC’s, Notebooks, and Workstations

  • Input Voltage Rails: Supports 2.5 V, 3.3 V and 5 V Rails
  • PVCC Voltage Range: 1.1 to 3.5 V
  • Integrated Power MOSFETs
  • Fast Load−Transient Response
  • PGOOD − Logic output pin to Monitor VTT Regulation
  • VRI − Reference Input Allows for Flexible Input Tracking Either Directly or Through Resistor Divider
  • EN − Logic input pin for Shutdown mode
  • Built−in Under Voltage Lockout and Over Current Limit

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Package Type

Case Outline

MSL Type

MSL Temp (°C)

Container Type

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ON Target

DDR Memory Type

IOUT VTT Max (A)

IQ Typ (µA)

VCC Bias Min (V)

VCC Bias Max (V)

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Power Good

Reference Price

NCP51401MNTXG

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CAD Model

Pb

A

H

P

DFN-10

506CL

1

260

REEL

3000

Y

DDR4

3

700

2.375

5.5

Yes

Yes

$0.5057

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Die Related Summary Data

Device: NCP51401MNTXG

Equivalent to wafer fab process: CMOS SUB

製品技術

製品技術

等価デバイス時間

MTBF/MTTF (時間)

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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