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クワッド 2 入力 NAND ゲート

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クワッド 2 入力 NAND ゲートです。高性能シリコン・ゲート CMOS です。MC74HC00A のピンアウトは LS00 と同等です。入力は標準 CMOS 出力に準拠、プルアップ抵抗器があれば LSTTL 出力に準拠します。

  • Output Drive Capability: 10 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS and TTL
  • Operating Voltage Range: 2 to 6 V
  • Low Input Current: 1 µA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance With the JEDEC Standard No. 7 A Requirements
  • Chip Complexity: 32 FETs or 8 Equivalent Gates
  • PbFree Packages are Available

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MC74HC00ADG

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CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

TUBE

55

No

NAND

4

2

6

15

4

$0.2259

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MC74HC00ADR2G

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Pb

A

H

P

SOIC-14

751A-03

1

260

REEL

2500

No

NAND

4

2

6

null

4

$0.1155

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MC74HC00ADR2G-Q

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CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

REEL

2500

No

NAND

4

2

6

-

4

$0.0892

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MC74HC00ADTR2G

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Pb

A

H

P

TSSOP-14 WB

948G

1

260

REEL

2500

No

NAND

4

2

6

15

4

$0.1073

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MC74HC00ADTR2G-Q

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CAD Model

Pb

A

H

P

TSSOP-14 WB

948G

1

260

REEL

2500

No

NAND

4

2

6

15

4

$0.1891

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Die Related Summary Data

Device: MC74HC00ADG

Equivalent to wafer fab process: CMOS SUB

製品技術

製品技術

等価デバイス時間

MTBF/MTTF (時間)

FITS

CMOS SUB

3

7566029322

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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