Logic Gates | MC14572UB

HEX ゲート、4 インバータ、1 NOR、1 NAND

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Overview

MC14572UB HEX 機能ゲートは、シングル・モノリシック構造の MOS P/N チャネル・エンハンスメントモード・デバイスによって構築されています。これらの相補 MOS ロジック・ゲートの主な利用目的は、低電力消費および/または高ノイズ耐量です。このチップは、4 つのインバータ、NOR ゲートと NAND ゲートを 1 つずつ内蔵しています。

  • Diode Protection on All Inputs
  • Single Supply Operation
  • Supply Voltage Range = 3.0 Vdc to 18 Vdc
  • NOR Input Pin Adjacent to VSS Pin to Simplify Use As An Inverter
  • NAND Input Pin Adjacent to VDD Pin to Simplify Use As An Inverter
  • NOR Output Pin Adjacent to Inverter Input Pin For OR Application
  • NAND Output Pin Adjacent to Inverter Input Pin For AND Application
  • Capable of Driving Two Low-power TTL Loads or One Low-Power Schottky TTL Load over the Rated Temperature Range
  • Pb-Free Packages are Available

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VCC Min (V)

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MC14572UBDG

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CAD Model

Pb

A

H

P

SOIC-16

751B-05

1

260

TUBE

48

N

SmartGate

6

3

18

100

null

$0.1613

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MC14572UBDR2G

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CAD Model

Pb

A

H

P

SOIC-16

751B-05

1

260

REEL

2500

N

SmartGate

6

3

18

100

null

$0.2295

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NLV14572UBDR2G

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Active

CAD Model

Pb

A

H

P

SOIC-16

751B-05

1

260

REEL

2500

N

SmartGate

6

3

18

null

null

$0.2088

More Details

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信頼性データ

Die Related Summary Data

Device: MC14572UBDG

Equivalent to wafer fab process: CMOS STD

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等価デバイス時間

MTBF/MTTF (時間)

FITS

CMOS STD

3

3597164517

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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