Logic Gates | MC74HC02A

クワッド 2 入力 NOR ゲート

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Overview

高性能シリコンゲート CMOS MC74HC02A のピンアウトは LS02 と同じです。入力は標準 CMOS 出力に準拠、プルアップ抵抗器があれば LSTTL 出力に準拠します。

  • This product is general usage and suitable for many different applications.

  • *Standard Device (No Specific End Product)

  • Output Drive Capability: 10 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS, and TTL
  • Operating Voltage Range: 2.0 to 6.0 V
  • Low Input Current: 1.0 mA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance with the Requirements Defined by JEDEC Standard No. 7A
  • Chip Complexity: 40 FETs or 10 Equivalent Gates
  • Pb-Free Packages are Available

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MC74HC02ADG

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CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

TUBE

55

N

NOR

4

2

6

15

4

$0.1564

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MC74HC02ADR2G

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CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

REEL

2500

N

NOR

4

2

6

15

4

$0.1155

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MC74HC02ADR2G-Q

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CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

REEL

2500

F

NOR

4

2

6

15

4

$0.1155

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MC74HC02ADTR2G

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Pb

A

H

P

TSSOP-14 WB

948G

1

260

REEL

2500

N

NOR

4

2

6

15

4

$0.1185

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MC74HC02ADTR2G-Q

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CAD Model

Pb

A

H

P

TSSOP-14 WB

948G

1

260

REEL

2500

F

NOR

4

4

6

15

4

$0.1741

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信頼性データ

Die Related Summary Data

Device: MC74HC02ADG

Equivalent to wafer fab process: CMOS SUB

製品技術

製品技術

等価デバイス時間

MTBF/MTTF (時間)

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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