Logic Gates | MC74HC10A

トリプル 3 入力 NAND ゲート

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Overview

MC74HC10A のピンアウトは LS10 と同等です。入力は標準 CMOS 出力に準拠、プルアップ抵抗器があれば LSTTL 出力に準拠します。

  • Output Drive Capability: 10 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS and TTL
  • Operating Voltage Range: 2 to 6 V
  • Low Input Current: 1 µA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance With the Requirements Defined JEDEC Standard No. 7 A
  • Chip Complexity: 36 FETs or 9 Equivalent Gates
  • PbFree Packages are Available

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Case Outline

MSL Type

MSL Temp (°C)

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VCC Min (V)

VCC Max (V)

tpd Max (ns)

IO Max (mA)

Reference Price

MC74HC10ADG

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Obsolete

CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

TUBE

55

N

NAND

3

2

6

null

4

Price N/A

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MC74HC10ADR2G

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Active

CAD Model

Pb

A

H

P

SOIC-14

751A-03

1

260

REEL

2500

N

NAND

3

2

6

null

4

$0.1272

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MC74HC10ADTG

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Obsolete

CAD Model

Pb

A

H

P

TSSOP-14 WB

948G

1

260

TUBE

96

N

NAND

3

2

6

null

4

Price N/A

More Details

MC74HC10ADTR2G

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Active

CAD Model

Pb

A

H

P

TSSOP-14 WB

948G

1

260

REEL

2500

N

NAND

3

2

6

null

4

$0.1341

More Details

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信頼性データ

Die Related Summary Data

Device: MC74HC10ADG

Equivalent to wafer fab process: CMOS SUB

製品技術

製品技術

等価デバイス時間

MTBF/MTTF (時間)

FITS

CMOS SUB

2

920154574

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Re-calculate Data

Data is based on the following assumptions.

Note: The temperature and confidence level may be adjusted to your requirements.

Disclaimer: A reliability FIT rate calculated using this tool shall not be used for any functional safety purpose. In case a raw FIT rate needs to be estimated for a component which is targeted to be used in a safety critical application (i.e. compliant to ISO 26262 standard) it should be calculated according to generic safety standards (IEC62380, IEC61709, SN29500, FIDES, etc.)

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