CMSIS Reference Macro Definition Documentation
RSL15_SYS_VER_MAJOR
#define RSL15_SYS_VER_MAJOR 0x01
Location: rsl15.h:73
RSL15_SYS_VER_MINOR
#define RSL15_SYS_VER_MINOR 0x00
Location: rsl15.h:76
RSL15_SYS_VER_REVISION
#define RSL15_SYS_VER_REVISION 0x01
Location: rsl15.h:79
RSL15_SYS_VER
#define RSL15_SYS_VER ((RSL15_SYS_VER_MAJOR << 12) | \ (RSL15_SYS_VER_MINOR << 8) | \ (RSL15_SYS_VER_REVISION))
Location: rsl15.h:82
__ARMv8MML_REV
#define __ARMv8MML_REV 0x0000U
Location: rsl15.h:129
__CM33_REV
#define __CM33_REV 0x0000U
Location: rsl15.h:130
__FPU_PRESENT
#define __FPU_PRESENT 1U
Location: rsl15.h:131
__DSP_PRESENT
#define __DSP_PRESENT 1U
Location: rsl15.h:132
__SAUREGION_PRESENT
#define __SAUREGION_PRESENT 1U
Location: rsl15.h:133
__MPU_PRESENT
#define __MPU_PRESENT 1U
Location: rsl15.h:134
__VTOR_PRESENT
#define __VTOR_PRESENT 1U
Location: rsl15.h:135
__NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS 3U
Location: rsl15.h:136
__Vendor_SysTickConfig
#define __Vendor_SysTickConfig 0U
Location: rsl15.h:137
I2C_REF_VALID
#define I2C_REF_VALID (((uint32_t)(ref) == (uint32_t)I2C) | \ ((uint32_t)(ref) == (uint32_t)I2C0) | \ ((uint32_t)(ref) == (uint32_t)I2C1))
Location: rsl15.h:194
LIN_REF_VALID
#define LIN_REF_VALID (((uint32_t)(ref) == (uint32_t)LIN) | \ ((uint32_t)(ref) == (uint32_t)LIN0))
Location: rsl15.h:199
PCM_REF_VALID
#define PCM_REF_VALID (((uint32_t)(ref) == (uint32_t)PCM) | \ ((uint32_t)(ref) == (uint32_t)PCM0))
Location: rsl15.h:203
PWM_REF_VALID
#define PWM_REF_VALID (((uint32_t)(ref) == (uint32_t)PWM) | \ ((uint32_t)(ref) == (uint32_t)PWM0))
Location: rsl15.h:207
SPI_REF_VALID
#define SPI_REF_VALID (((uint32_t)(ref) == (uint32_t)SPI) | \ ((uint32_t)(ref) == (uint32_t)SPI0) | \ ((uint32_t)(ref) == (uint32_t)SPI1))
Location: rsl15.h:211
UART_REF_VALID
#define UART_REF_VALID (((uint32_t)(ref) == (uint32_t)UART) | \ ((uint32_t)(ref) == (uint32_t)UART0))
Location: rsl15.h:216
TIMER_REF_VALID
#define TIMER_REF_VALID (((uint32_t)(ref) == (uint32_t)TIMER) | \ ((uint32_t)(ref) == (uint32_t)TIMER0) | \ ((uint32_t)(ref) == (uint32_t)TIMER1) | \ ((uint32_t)(ref) == (uint32_t)TIMER2) | \ ((uint32_t)(ref) == (uint32_t)TIMER3))
Location: rsl15.h:220
DMA_REF_VALID
#define DMA_REF_VALID (((uint32_t)(ref) == (uint32_t)DMA) | \ ((uint32_t)(ref) == (uint32_t)DMA0) | \ ((uint32_t)(ref) == (uint32_t)DMA1) | \ ((uint32_t)(ref) == (uint32_t)DMA2) | \ ((uint32_t)(ref) == (uint32_t)DMA3))
Location: rsl15.h:227
FLASH_REF_VALID
#define FLASH_REF_VALID (((uint32_t)(ref) == (uint32_t)FLASH) | \ ((uint32_t)(ref) == (uint32_t)FLASH0))
Location: rsl15.h:234
GPIO_PAD_COUNT
#define GPIO_PAD_COUNT 16
Location: rsl15.h:247
GPIO_GROUP_LOW_PAD_RANGE
#define GPIO_GROUP_LOW_PAD_RANGE 16
Location: rsl15.h:248
GPIO_EVENT_CHANNEL_COUNT
#define GPIO_EVENT_CHANNEL_COUNT 4
Location: rsl15.h:249
GPIO0
#define GPIO0 0
Location: rsl15.h:252
GPIO1
#define GPIO1 1
Location: rsl15.h:253
GPIO2
#define GPIO2 2
Location: rsl15.h:254
GPIO3
#define GPIO3 3
Location: rsl15.h:255
GPIO4
#define GPIO4 4
Location: rsl15.h:256
GPIO5
#define GPIO5 5
Location: rsl15.h:257
GPIO6
#define GPIO6 6
Location: rsl15.h:258
GPIO7
#define GPIO7 7
Location: rsl15.h:259
GPIO8
#define GPIO8 8
Location: rsl15.h:260
GPIO9
#define GPIO9 9
Location: rsl15.h:261
GPIO10
#define GPIO10 10
Location: rsl15.h:262
GPIO11
#define GPIO11 11
Location: rsl15.h:263
GPIO12
#define GPIO12 12
Location: rsl15.h:264
GPIO13
#define GPIO13 13
Location: rsl15.h:265
GPIO14
#define GPIO14 14
Location: rsl15.h:266
GPIO15
#define GPIO15 15
Location: rsl15.h:267
SYS_DUMMY_READ
#define SYS_DUMMY_READ SYSCTRL->PROD_STATUS
Location: rsl15.h:280
SYS_DUMMY_WRITE
#define SYS_DUMMY_WRITE SYSCTRL->CC_DCU_EN0
Location: rsl15.h:283
ERRNO_NO_ERROR
#define ERRNO_NO_ERROR 0x0000
Location: rsl15.h:341
ERRNO_GENERAL_FAILURE
#define ERRNO_GENERAL_FAILURE 0x0001
Location: rsl15.h:344
DEFAULT_FREQ
#define DEFAULT_FREQ 5000000
Location: system_rsl15.h:89
STANDBYCLK_DEFAULT_FREQ
#define STANDBYCLK_DEFAULT_FREQ 32768
Location: system_rsl15.h:92
RFCLK_BASE_FREQ
#define RFCLK_BASE_FREQ 48000000
Location: system_rsl15.h:95
EXTCLK_MAX_FREQ
#define EXTCLK_MAX_FREQ 48000000
Location: system_rsl15.h:98
SWCLK_MAX_FREQ
#define SWCLK_MAX_FREQ 48000000
Location: system_rsl15.h:101
RCOSC_MAX_FREQ
#define RCOSC_MAX_FREQ 12000000
Location: system_rsl15.h:104