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パッケージ図

パッケージ図 のため  Voltage Regulation (Linear, Switching) (すべてを表示)

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1 - 19 of 19    [  1 ]  
Document Title
Document ID/Size
Revision
3 LEAD D2PAK 936-03 (50kB) E
6 Pin DFN, 2 x 2.2, 0.65 Pitch 506BA (43kB) A
8 LEAD PDIP 626-05 (51kB) P
8 PIN DFN, 4x4 488AF (44kB) C
DFN10, 3x3, 0.5P 485C (49kB) E
DFN6, 3.0x3.3x0.9mm, 0.95mm Pitch 506AX (55kB) A
DPAK (SINGLE GAUGE) TO-252 369C (81kB) F
PDIP (8 Minus Pin 6), Gull Wing 626AA (61kB) A
PDIP-16 648-08 (50kB) V
PDIP-7 (PDIP-8 LESS PIN 6) 626A-01 (50kB) C
PDIP-7 (PDIP-8 LESS PIN 7) 626B (50kB) D
SO-16 WB 751G-03 (47kB) D
SOIC 7 CASE OUTLINE 751U (48kB) E
SOIC-8 Narrow Body 751-07 (53kB) AK
SOT-223 (TO-261) 4 LEAD 0.0318 (59.6kB) R
TO-220, SINGLE GAUGE, 3-LEAD 221AB (44kB) A
TSOP-5 483 (48kB) N
TSOP-6 318G-02 (51kB) V
WDFN6 1.5x1.5, 0.5P 511BJ (47kB) C
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