Radio SoC evaluation board, version 1 (QFN based)

Overview

The RSL10 development board is used to easily develop Bluetooth® low energy technology-enabled applications based on the industry’s lowest power radio System-on-Chip (SoC).

Key Features:

  • Compliance with the Arduino form factor
  • Support for PMOD (e.g., J4 is a standard connector)
  • On-board J-Link feature for simple debugging
  • Alternate on-board SWJ-DP (serial-wire and/or JTAG) for ARM® Cortex® -M3 processor debugging
  • Access to all RSL10 peripherals via standard 0.1" headers
  • On-board 4-bit level translator to translate the LPDSP32 debug interface at a low voltage to a 3.3 V JTAG debugger
  • Antenna matching and filtering network
  • Integrated PCB antenna

Evaluation/Development Tools

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Radio SoC evaluation board, version 1 (QFN based)

$40

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技術文書

Name / Description

Document Type

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EVBUM2529/D

4

Eval Board: Manual

737.28 KB

EN

Eval Board: Manual

September 01, 2022

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RSL10-002GEVB_SCHEMATIC

0

Eval Board: Schematic

844.8 KB

EN

Eval Board: Schematic

July 20, 2017

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RSL10-002GEVB_BOM_ROHS

0

Eval Board: BOM

140.29 KB

EN

Eval Board: BOM

July 20, 2017

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RSL10-002GEVB_Gerber

1

Eval Board: Gerber

6.03 MB

EN

Eval Board: Gerber

July 20, 2017

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RSL10-002GEVB_TEST_PROCEDURE

0

Eval Board: Test Procedure

1.41 MB

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Eval Board: Test Procedure

July 20, 2017

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