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データシート のため  Spread Spectrum EMI Reduction Clocks (すべてを表示)

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Document Title
Document ID/Size
Revision
Revision Date
1.8V Programmable OmniClock Generator with Single-Ended (LVCMOS) and Differential (LVDS/HCSL) Output with Individual Output Enable and Individual VDDO NB3V63143G/D (271kB) 2 Jan, 2016
3.3 V / 2.5 V Programmable OmniClock Generator with I2C / SMBus Interface NB3H73113G/D (297kB) 0 Mar, 2017
3.3 V OmniClock Generator with Single Ended LVCMOS Output NB3H60113GH2/D (331kB) 0 Dec, 2019
3.3 V/2.5 V Programmable OmniClock Generator with Single Ended (LVCMOS/LVTTL) and Differential (LVPECL/LVDS/ HCSL/CML) Outputs NB3H60113G/D (286kB) 2 Jan, 2016
3.3 V/2.5 V Programmable OmniClock Generator with Single-Ended (LVCMOS/LVTTL) and Differential (HCSL/LVDS/LVPECL/CML) Outputs with Individual Output Enable and Individual VDDO NB3H63143G/D (299kB) 4 Jan, 2016
3.3V, Crystal to 100MHz/200MHz Quad HCSL/LVDS Clock Generator NB3N51034/D (434kB) 3 Sep, 2017
Dual HCSL Clock Generator, 3.3 V, Crystal to 25 MHz, 100 MHz, 125 MHz and 200 MHz NB3N51032/D (435kB) 4 May, 2020
PCIe Clock Generator, Crystal to 100 MHz Quad HCSL / LVDS, 3.3 V NB3N51054/D (158kB) 5 May, 2018
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